View SP5301_36094.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
SP5301 Universal Serial Bus Transceiver
s Utilizes digital inputs and outputs to transmit and receive USB cable data s Supports 12Mbps "Full Speed" and 1.5Mbps "Low Speed" serial data transmission s Compatible with the VHDL "Serial Interface Engine" from USB developer's conference s Hysteresis on VP and VM Function s Ease of use for PC peripheral expansion s Protocol flexibility for mixed-mode isochronous data transfers and asynchronous messaging s Available in 14 pin 0.15" SOIC package s Rail to Rail receiver common mode input range, 20mV typical receiver sensitivity s Low Power; 20 nA in SUSPEND mode s Enhanced version of the PDIUSBP11 DESCRIPTION The SP5301 is a half-duplex Universal Serial Bus (USB) differential transceiver that interfaces with the USB Serial Interface Engine (SIE). The SP5301 is designed to allow 3.3V or 5.0V standard and programmable logic to interface with the physical layer of the Universal Bus. The USB protocol can support multiple connections for up to 127 physical devices composed of many diverse functions. It is capable of transmitting and receiving serial data at both full speed (12Mbps) and low speed (1.5Mbps) data rates. Implementation of the Serial Interface Engine along with the USB transceiver allow the designer to make flexible USB compatible devices with widely available logic components. The SP5301 is specifically geared towards low-cost USB solutions for the PC peripheral market.
RERR 1 OE RCV VP 2 3 4
14 13 12 11 10 9 8
VCC VMO VPO D+ DSPEED RSEO
SPEED VMO VPO OE
RE
DD+ Receiver Logic
VM 5 SUSPND 6 GND 7
RE
RE
SUSPND RCV RERR RSE0 VP VM
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device.
VCC.....................................................................-0.5V to +6.5V IGND, ICC (DC VCC or GND current)............................+100mA Input Current and Voltages: IIK (DC input diode current at VI < 0)......................-50mA VI (DC input voltage, Note 1)......................-0.5 to +6.5V VI/O (DC input voltage range, I/O).........-0.5V toVC C 0.5V Output Currents and Voltages: IOK (DC output diode current where VO > VCC or VO < 0)...........................................+50mA VO (DC output voltage), Note 1.........................................-0.5V to (VCC + 0.5V) IO (DC output source or sink current for VP/VM/RCV/RERR/RSEO pins,VO = 0 to VCC)..+15mA IO (DC output source or sink current for D+/D- pins, VO = 0 to VCC.................................+50mA Storage Temperature.................................-65C to +150C Ptot (Power dissipation per package)......................1000mW
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp current ratings are observed.
OE 0 0 1 1
SUSPND 0 1 0 1
RCV 0 0 Active 0
RERR 0 0 Active Active
RSEO 0 0 Active Active
VP/VM 0 0 Active Active
D+/DActive Active HI-Z HI-Z
Comments Driving Driving Receiving Low Power State
Function Table
SPEED VMO VPO OE
RE
DD+ Receiver Logic
RE
RE
SUSPND RCV
Figure 1. Block Diagram
SP5301DS/10 SP5301 Universal Serial Bus Transceiver (c) Copyright 2000 Sipex Corporation
RERR RSE0
VP
VM
2
SPECIFICATIONS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +3.6V with Tamb = 0C to +70C. Typical values apply at VCC = +3.3V and Tamb = 25C.
MIN. TYP. MAX. UNITS DC PARAMETERS HIGH level input, VIH LOW level input, VIL HIGH level Driver output impedance R DH LOW level Driver output impedance RDL D+/D- High and Low Output Levels VOH VOL Logic HIGH level output VOH VOH VOH Logic LOW level output VOL VOL VOL Receiver Differential Input Threshold V DI Receiver Common Mode Range VCM Quiescent supply current, ICCQ Supply current in SUSPND ICCS Active supply current (Full Speed) ICCFS Active supply current (Low Speed) ICCLS Input leakage current, II Tri-State output OFF-state current IOZ Transceiver Capacitance (D+/D-) C IN 20 PF 10 A VL = VI or VIL, VO = VCC or GND, Note 3 0.1 5 A VCC = 3.6V, VI = 5.5V or GND, not for I/O pins 3 8 mA VCC = 3.6V, CL = 350pF, 1, 0, 1, 0, ... input 6 14 mA VCC = 3.6V, CL = 50pF, 1, 0, 1, 0, ... input 0.02 1.0 A VCC = 3.6V, VI = VCC or GND, IO = 0 450 800 A VCC = 3.6V, VI = VCC or GND, IO = 0 0 VCC V -90 +20 +90 mV Common Mode Voltage 0V to VCC 0.3 0.8 0.4 0.2 V V V VCC = 3.0V, IO = 6mA, Note 2 VCC = 3.0V, IO = 4mA, Note 2 VCC = 3.0V, IO = 200A, Note 2 2.2 2.4 2.8 2.7 V V V VCC = 3.0V, IO = 6mA, Note 2 VCC = 3.0V, IO = 4mA, Note 2 VCC = 3.0V, IO = 200A, Note 2 28 2.8 0.3 35 43 V V Note 3, Note 4 RL of 15K to Ground RL of 1.5K to 3.6V 28 35 43 Note 3, Note 4 2.0 0.8 V V Note 2 Note 2 CONDITIONS
NOTE 2: All signals except D+ and D-. NOTE 3: See "Load D+ and D-" diagram for testing details. NOTE 4: This value includes a 22 external resistor.
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
3
SPECIFICATIONS (continued)
Unless otherwise noted, the following specifications apply for GND = 0V, VCC = 3.3V, tR = tF = 3.0ns, with Tamb = 0C to +70C. Typical values apply at Tamb = 25C.
MIN. AC PARAMETERS VPO/VMO to D+/D- Delay, Full Speed tPLH tPHL D+/D- Rise and Fall Times, Full Speed trise tfall VPO/VMO to D+/D- Delay, Low Speed tPLH tPHL D+/D- Rise and Fall Times, Low Speed trise tfall D+/D- to RCV Delay tPLH tPHL D+/D- to VP/VM Delay tPLH tPHL D+/D- to RERR Delay tPLH tPHL D+/D- to RSEO Delay tPLH tPHL OE to D+/DtPHZ tPZH tPLZ tPZL Setup for SPEED, tsu D+/D- Crossover point, VCR 0 1.3 75 75 30 30 4 4 4 4
TYP.
MAX.
UNITS
CONDITIONS
11 11
15 15
ns ns
figure 2, 9 figure 2, 9
5.6 5.6
20 20
ns ns
figure 3, 9 figure 3, 9
80 80
200 200
ns ns
figure 2, 9 figure 2, 9
110 110
250 250
ns ns
figure 3, 9 figure 3, 9
8.0 8.0
16 16
ns ns
figure 4, 7 figure 4, 7
6.0 6.0
10 10
ns ns
figure 2, 7 figure 2, 7
14 14
20 20
figure 7, Note 5 figure 7, Note 5
11 11
16 16
figure 7, Note 5 figure 7, Note 5
11 12 11 12
20 20 20 20
ns ns ns ns ns
figure 5, 8 figure 5, 8 figure 5, 8 figure 5, 8 figure 6, 9
2.0
NOTE 5: Delay defined from Midpoint of input to Midpoint of output, with other input static (High or Low).
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
4
DESCRIPTION The SP5301 is a half-duplex Universal Serial Bus (USB) differential transceiver that interfaces with the VHDL Serial Interface Engine (SIE) from the USB developer's conference. The SP5301 is designed to allow digital logic to communicate with the physical layer of the Universal Bus. The USB is a cable bus that supports data exchange between a host computer and a wide range of peripherals. Attached peripherals share USB bandwidth through a host scheduled token based protocol. The USB allows peripherals to be attached, configured, used, and detached while the host and other peripherals are in operation. This is referred to as dynamic, or hot, attachment and removal. USB attributes include lower costs, hot plug-and-play with dynamic attach-detach capabilities, ease of design and use, multiple peripherals, guaranteed latency, and guaranteed bandwidth. The USB is specified to be an industry standard extension to the PC architecture with a focus on Computer Telephony Integration (CTI), consumer, and productivity applications. The architecture of the USB protocol can ease the expansion of PC peripherals, provide a low-cost solution that supports tranfer rates up to 12Mbps, and can fully support real-time data for voice, audio, and compressed video. The USB protocol can provide protocol flexibility for mixed-mode isochronous data transfers and asynchrounous messaging. Guaranteed bandwidth and low latencies are appropriate for many telephony and audio applications. A 12Mbps bus covers the mid-speed and low-speed data ranges. Typically, mid-speed data types are isochronous and low-speed data comes from interactive devices. Isochronous communication can only be used by full speed devices.
THEORY OF OPERATION The USB protocol can support multiple connections for up to 127 physical devices composed of many diverse functions. This makes the SP5301 an ideal solution for multidrop applications. This lower protocol overhead results in high bus utilization. An isochronous workload may utilize the entire USB bus bandwidth. The USB protocol reflects a robust capability of dynamic insertion and removal of devices identified in user perceived real-time. This PC plug and play quality preserves the marketable synergy with the PC industry, being a simple protocol to implement and integrate into existing operating systems. The SP5301 contains a differential driver and a differential receiver in a half-duplex configuration. The driver is enabled by the OE pin. If OE is asserted LOW, the driver is active and the D- and D+ pins drive USB signals. The differential receiver is also controlled by the OE pin. If OE is HIGH, while SUSPEND is LOW, the receiver is active and the driver is in tri-state. In this receive mode, the D- and D+ pins are now receiving USB signals. The typical driver output voltage swing for D- and D+ of the SP5301 will be less than +0.3V for the LOW state and greater than +2.8V for the HIGH state. The SP5301 is a USB differential interface with very high receiver input sensitivity. This makes data virtually immune to noise on the USB pipeline. The +90mV minimum receiver input sensitivity of the SP5301 ensures recovery of even severely attenuated signals.
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
5
The SP5301 incorporates a receive error circuit. This error circuit outputs CMOS signals on the receive error pin (RERR) and the receive single ended zero pin (RSE0) under specific conditions from the USB bus. When OE is asserted LOW, it enables the USB driver to transmit data on the D+ and D- output pins. The receive error circuit is disabled in this condition and both RERR and RSE0 are forced low. The receive error circuit is activated in receive mode when OE is HIGH. The receive error circuit will signal an error state when both D+ and D- are HIGH by forcing RERR HIGH. The receiver error circuit will signal a single ended zero when both D+ and D- are LOW by forcing RSE0 HIGH. A single ended zero is a valid state and is used to signal an end of packet (EOP) in signal transmission. (CAUTION: Since both RERR and RSE0 are CMOS outputs, care must be taken to ensure that RERR and RSE0 are NOT connected to VCC or GND.) The SP5301 has a suspend input pin (SUSPND) which enables a low power state while the USB bus is inactive. When SUSPND is asserted HIGH or SP5301 is in transmit mode (OE is LOW), the receive data pin (RCV) will be forced LOW.
The SP5301 can transmit and receive serial data at both full speed, 12Mbps, and at low speed, 1.5Mbps, data rates. At full speed, the active supply current of the SP5301 is 6mA. In the suspend state, the supply current is typically 20nA. Full speed USB applications include ISDN, PBX, POTS, sampled analog devices, audio, printers, and telephony designs. Low speed USB applications include locator devices, keyboards, mouse, tablets, light pens, stylus, game peripherals, virtual reality peripherals, and monitor configurations. The USB protocol provides full support for the real-time data for voice, audio, and compressed video. The SP5301 is specifically geared towards low-cost USB solutions for the PC peripheral markets Waveforms 1 and 2 below show device behavior in transmit mode, at both low and full speed, with the D+/D- pins driving the load specified in figure 9.
[ T]
[ T]
T
T
2
Ch1 500mV Ch2 500mV M 250nS Ch1 1.68 V
2
Ch1 500mV Ch2 500mV M 20.0nS Ch1 1.68 V
Waveform 1. D+/D- Transmit Mode, low speed
Waveform 2. D+/D- Transmit Mode, full speed
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
6
PINOUT
RERR 1 OE RCV VP 2 3 4
14 13 12 11 10 9 8
VCC VMO VPO D+ DSPEED RSEO
Pin 6 -- SUSPND -- Suspend. This input pin provides a low power state for the SP5301 while the USB bus is inactive. While the SUSPND pin is asserted HIGH, it will drive RCV pin LOW. Pin 7 -- GND -- Ground. Pin 8 -- RSEO -- Receive Single Ended Zero. This CMOS level output pin is forced HIGH when both D+ and D- are LOW to signal the end of packet (EOP) in signal transmission. CAUTION: Since RSEO is a CMOS output, care must be taken to ensure that RSEO is NOT connected to VCC or GND. Pin 9 -- SPEED -- Speed. Edge rate control. This input pin determines edge rates, where a logic HIGH designates edge rates for "full speed" and logic LOW designates edge rates for "low speed." Pin 10, 11 -- D-, D+ -- Data-, Data+. These differential data bus I/O pins conform to the Universal Serial Bus standard. Pin 12, 13 -- VPO, VMO -- These are the
VPO VMO RESULT 0 0 1 1 0 1 0 1 SE0 Logic Low Logic High Undefined
VM 5 SUSPND 6 GND 7
PIN ASSIGNMENTS Pin 1 -- RERR -- Receive Error. This CMOS level output pin is forced HIGH when both D+ and D- are HIGH to signal an error state. CAUTION: Since RERR is a CMOS output, care must be taken to ensure that RERR is NOT connected to VCC or GND. Pin 2 -- OE -- Output Enable Not. When asserted LOW, this input pin enables the driver to transmit data on the bus. When HIGH, the receiver is active and the driver outputs are in tri-state. Pin 3 -- RCV -- Receive data. This is a CMOS level output pin from D+ and D-, typically connected to the inputs of the USB Serial Interface Engine (SIE). Pin 4, 5 -- VP, VM -- Gated version of D+ and D-. Used to detect single ended zero (SEO), error conditions, and interconnect speed. These pins have CMOS level outputs.
VP 0 0 1 1
SP5301DS/10
logic inputs to the differential driver, typically connected to the outputs of the Serial Interface Engine (SIE). Pin 14 -- VCC -- +3.0V to +3.6V power supply.
VM RESULT 0 1 0 1 SE0 Low Speed Full Speed Error
SP5301 Universal Serial Bus Transceiver (c) Copyright 2000 Sipex Corporation
7
AC WAVEFORMS
2.7V INPUT GND tPLH VOH OUTPUT VOL 50% tPHL 50% 50% 50%
tRISE VOH VOL 90% 10% 90%
tFALL
10%
Figure 2. D+/D- to VP/VM or VPO/VMO to D+/D-
Figure 3. Rise and Fall Times
D+ VCR DVOH 50% VOL 50% tPLH VCR
2.0V
OE
2.7V 1.5V OV tPZH tPZL VOH D+/DVOL 50% VX tPHZ tPLZ VY 50% 1.5V
1.0V tPHL
Figure 4. D+/D to RCV
Figure 5. OE to D+/D-
NOTE: VX = VOL + 0.3V, VY = VOH - 0.3V, VCC > +3.0V, VOL and VOH are the typical output voltage drops that occur with the output load.
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
8
AC WAVEFORMS (continued)
2.7V SPEED GND tSU 2.7V D+/DGND VCR VCR tSU 50% 50%
Test Point D.U.T. 25pF
Figure 6. Setup for Speed
Figure 7. Load for VM, VP, RERR, RSEO and RCV
Test Point D.U.T. 22 500 50pF V
TEST D-/LS D+/LS D-/FS D+/FS
SW1 Close Open Open Close Test Point 22 15K SW1 CL
VCC 1.5K
D.U.T.
V = 0V for tPZH and tPHZ V = VCC for tPZL and tPLZ
CL = 50pF, Full Speed CL = 350pF, Low Speed
Figure 9. Load for D+/D-
Figure 8. Load for Enable and Disable Times
NOTE: VX = VOL + 0.3V, VY = VOH - 0.3V, VCC > +3.0V, VOL and VOH are the typical output voltage drops that occur with the output load.
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
9
AC WAVEFORMS (continued)
15 14 13
Delay (ns)
6 5.5
11 10 9X 8 7 6 0V 0.5V 1.0V 1.5V 2.0V 2.5V 3.0V Common Mode (Volts) X X X X X X
tR/tF (nS)
12
50mV 100mV 200mV X 500mV
5 4.5 4 3.5 3 10 20 30 Load (pF) 40 50
tR/tF
Figure 10. Receiver Delay VS. Common Mode Voltage (with peak to peak overdrive voltage as a parameter)
Figure 11. Transmitter Rise and Fall Time VS. Capacitive Load (full speed)
D+ 50% D-
2.0V
D+ 50% DtPLH
2.0V 1.0V
tPLH 1.0V 50%
50% RSEO
RERR
Figure 12. D+/D- to RERR Delay
Figure 13. D+/D- to RSEO Delay
NOTE: VX = VOL + 0.3V, VY = VOH - 0.3V, VCC > +3.0V, VOL and VOH are the typical output voltage drops that occur with the output load.
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
10
PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (NARROW)
E
H
h x 45 D A O e B A1 L
DIMENSIONS (Inches) Minimum/Maximum (mm) A A1 B D E e H h L O
8-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249 0.014/0.019 (0.35/0.49) 0.189/0.197 (4.80/5.00) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8)
14-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249) 0.013/0.020 (0.330/0.508)
16-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249) 0.013/0.020 (0.330/0.508)
0.337/0.344 0.386/0.394 (8.552/8.748) (9.802/10.000) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8)
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
11
PACKAGE:
PLASTIC THIN SMALL OUTLINE (TSSOP)
E2 E
D A O e B A1 L
DIMENSIONS in inches (mm) Minimum/Maximum A A1 B D E e E2 L O
14-PIN - /0.43 (- /1.10) 0.002/0.006 (0.05/0.15) 0.007/0.012 (0.19/0.30) 0.193/0.201 (4.90/5.10) 0.169/0.177 (4.30/4.50) 0.026 BSC (0.65 BSC) 0.126 BSC (3.20 BSC) 0.020/0.030 (0.50/0.75) 0/8
SP5301DS/10
SP5301 Universal Serial Bus Transceiver
(c) Copyright 2000 Sipex Corporation
12
ORDERING INFORMATION
Model Temperature Range Package Types SP5301CN.......................................................0C to +70C.....................................................14-Pin NSOIC SP5301CY.......................................................0C to +70C.....................................................14-Pin TSSOP
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Corporation
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation Headquarters and Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. SP5301DS/10 SP5301 Universal Serial Bus Transceiver (c) Copyright 2000 Sipex Corporation
13

▲Up To Search▲

Price & Availability of SP5301

	To Download SP5301 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .